[1] T. Chiang, “The new analytical subthreshold behavior model for dual material gate (DMG) SOI MESFET,” 2008 9th International Conference on Solid-State and Integrated-Circuit Technology, IEEE, China, 2008.
[2] H. Jia, Y. Liang, T. Li, Y. Tong, S. Zhu, X. Wang,
T. Zeng,
Y. Yang, “Improved DRUS 4H-SiC MESFET with high power added efficiency,” Micromachines, 11, 35, 2020.
[3] H. Jia, Y. Tong, T. Li, S. Zhu, Y. Liang, X. Wang, T. Zeng, Y, Yang, “An Improved 4H-SiC MESFET with a Partially Low Doped Channel,” Micromachines, 10, 555, 2019.
[4] K. Lee, M. Al-Mudares, S. Beaumont, C. Wilkinson, J. Frost, C. Stanley, “Very high-transconductance short-channel GaAs MESFETs with Ga, Al, As buffer layer,” Electronics Letters, 23, 11-12, 1987.
[5] C-S. Hou, C-Y. Wu, “ A 2-D analytic model for the threshold-voltage of fully depleted short gate-length Si-SOI MESFETs,” IEEE Transactions on Electron Devices, 42, 2156-2162, 1995.
[6] J. Spann, V. Kushner, TJ. Thornton, J. Yang, A. Balijepalli, HJ. Barnaby,
X. J. Chen,
D. Alexander ,
W.T. Kemp,
S.J. Sampson,
M.E. Wood, “Total dose radiation response of CMOS compatible SOI MESFETs,” IEEE transactions on nuclear science, 52, 2398-2402, 2005.
[7] S. M. Razavi, “An Improved 4H-SiCMESFET with Un-Doped and Recessed Area under the Gate for High Power Applications,” Silicon, 699-674, 2020.
[8] C. L. Zhu, C. C. Rusli, B. Tin, G. H. Zhang, S. F. Yoon, J. Ahn, “Improved performance of SiC MESFETs using double-recessed structure,” Microelectronic Engineering, 83, 92–95, 2006.
[9] H. Jia, T. Li, Y. Tong, S. Zhu, Y. Liang, X. Wang, T. Zeng, Y. Yintang, “A novel 4H-SiC MESFET with symmetrical lightly doped drain for high voltage and high power applications,” Mater Sci Semicond Process, 105, 104707, 2020.